VL7201 CAD FOR VLSICIRCUITS

VL7201 CAD FOR VLSICIRCUITS

UNIT I VLSIDESIGNMETHODOLOGIES

Introduction to VLSI Design methodologies - Review of Data structures and algorithms - Review of VLSI Design automation tools - Algorithmic Graph Theory and Computational Complexity Tractable and Intractable problems - general purpose methods for combinatorial optimization. 

UNIT II DESIGNRULES

Layout Compaction - Design rules - problem formulation - algorithms for constraint graph compaction - placement and partitioning - Circuit representation - Placement algorithms partitioning 

UNIT III FLOOR PLANNING

Floor planning concepts - shape functions and floorplan sizing - Types of local routing problems Area routing -channel routing -globalrouting -algorithmsforglobal routing. 

UNIT IV SIMULATION

Simulation - Gate-level modeling and simulation - Switch-level modeling and simulation Combinational Logic Synthesis - Binary Decision Diagrams - Two Level Logic Synthesis. 

UNIT V MODELLING AND SYNTHESIS

High level Synthesis - Hardware models - Internal representation - Allocation assignment and scheduling - Simple scheduling algorithm - Assignment problem - High level transformations. 

REFERENCES: 

1. S.H. Gerez, "AlgorithmsforVLSI Design Automation", JohnWiley & Sons,2002. 

2. N.A. Sherwani, "Algorithms for VLSI Physical Design Automation", Kluwer Academic Publishers, 2002. 

3. Sadiq M. Sait, Habib Youssef, “VLSI Physical Design automation: Theory and Practice”, World   scientific 1999 

4. Steven M.Rubin, “Computer Aids for VLSI Design”, Addison Wesley Publishing 1987