AP7004 HARDWARE - SOFTWARE CO-DESIGN

AP7004 HARDWARE - SOFTWARE CO-DESIGN

UNIT I SYSTEMSPECIFICATION AND MODELLING

Embedded Systems, Hardware/Software Co-Design,Co-Design for System Specification and Modelling , Co-Design for Heterogeneous Implementation - Processor Synthe Single-Processor Architectures with one ASIC, Single-Processor Architectures with many ASICs, Multi-Processor Architectures, Comparison of Co- Design Approaches, Models of Computation ,Requirements for Embedded System Specification. 

UNIT II HARDWARE/SOFTWARE PARTITIONING

The Hardware/Software Partitioning Problem, Hardware-Software Cost Estimation, Generation of the Partitioning Graph , Formulation of the HW/SW Partitioning Problem , Optimization , HW/SW Partitioning based on Heuristic Scheduling, HW/SW Partitioning basedon Genetic Algorithms . 

UNIT III HARDWARE/SOFTWARE CO-SYNTHESIS

The Co-Synthesis Problem, State-Transition Graph, Refinement and Controller Generation, Distributed SystemCo-Synthesis

UNIT IV PROTOTYPING AND EMULATION

Introduction, Prototyping and Emulation Techniques , Prototyping and Emulation Environments ,Future Developments in Emulation and Prototyping ,Target Architecture- Architecture Specialization Techniques ,System Communication Infrastructure, Target Architectures and Application System Classes, Architectures for Control-Dominated Systems, Architectures for Data-Dominated Systems ,Mixed Systems and Less Specialized Systems 

UNIT V DESIGNSPECIFICATION AND VERIFICATION

Concurrency, CoordinatingConcurrent Computations, Interfacing Components, Verification ,Languages for System-Level Specification and Design System-Level Specification ,Design Representation for System Level Synthesis, System Level Specification Languages, Heterogeneous Specification and Multi-Language Co- simulation. 

REFERENCES: 

1. Ralf Niemann , “Hardware/Software Co-Design for Data Flow Dominated Embedded Systems”, Kluwer AcademicPub, 1998. 

2. Jorgen Staunstrup, Wayne Wolf ,”Hardware/Software Co-Design: Principles and Practice”, KluwerAcademicPub,1997. 

3. Giovanni De Micheli , Rolf Ernst Morgon,” Reading in Hardware/Software Co-Design “Kaufmann Publishers,2001.

AP7003 DIGITAL CONTROL ENGINEERING

AP7003     DIGITAL CONTROL ENGINEERING

UNIT I     PRINCIPLES OF CONTROLLERS

Review of frequency and time response analysis and specifications of control systems, need for controllers, continues time compensations, continues time PI, PD, PID controllers, digital PID controllers. 

UNIT II      SIGNAL PROCESSING IN DIGITAL CONTROL

Sampling, time and frequency domain description, aliasing, hold operation, mathematical model of sample and hold, zero and first order hold, factors limiting the choice of sampling rate, reconstruction. 

UNIT III MODELING AND ANALYSIS OF SAMPLED DATA CONTROL SYSTEM

Difference equation description, Z-transform method of description, pulse transfer function, time and frequency response of discrete time control systems, stability of digital control systems, Jury's stability test, state variable concepts, first companion, second companion, Jordan canonical models, discrete state variable models, elementary principles. 

UNIT IV DESIGN OF DIGITAL CONTROL ALGORITHMS

Review of principle of compensator design, Z-plane specifications, digital compensator design using frequency response plots, discrete integrator, discrete differentiator, development of digital PID controller, transfer function, design in the Z-plane. 

UNIT V PRACTICAL ASPECTS OF DIGITAL CONTROL ALGORITHMS

Algorithm development of PID control algorithms, software implementation, implementation using microprocessors and microcontrollers, finite word length effects, choice of data acquisition systems, microcontroller based temperature control systems, microcontroller based motor speed control systems. 

REFERENCES : 

1. M.Gopal, "Digital Control and Static Variable Methods", Tata McGraw Hill, New Delhi, 1997. 

2. John J. D'Azzo, "Constantive Houpios, Linear Control System Analysis and Design", Mc Graw Hill, 1995. 

3. Kenneth J. Ayala, "The 8051 Microcontroller- Architecture, Programming and Applications", Penram International, 2nd Edition, 1996.

VL7201 CAD FOR VLSICIRCUITS

VL7201 CAD FOR VLSICIRCUITS

UNIT I VLSIDESIGNMETHODOLOGIES

Introduction to VLSI Design methodologies - Review of Data structures and algorithms - Review of VLSI Design automation tools - Algorithmic Graph Theory and Computational Complexity Tractable and Intractable problems - general purpose methods for combinatorial optimization. 

UNIT II DESIGNRULES

Layout Compaction - Design rules - problem formulation - algorithms for constraint graph compaction - placement and partitioning - Circuit representation - Placement algorithms partitioning 

UNIT III FLOOR PLANNING

Floor planning concepts - shape functions and floorplan sizing - Types of local routing problems Area routing -channel routing -globalrouting -algorithmsforglobal routing. 

UNIT IV SIMULATION

Simulation - Gate-level modeling and simulation - Switch-level modeling and simulation Combinational Logic Synthesis - Binary Decision Diagrams - Two Level Logic Synthesis. 

UNIT V MODELLING AND SYNTHESIS

High level Synthesis - Hardware models - Internal representation - Allocation assignment and scheduling - Simple scheduling algorithm - Assignment problem - High level transformations. 

REFERENCES: 

1. S.H. Gerez, "AlgorithmsforVLSI Design Automation", JohnWiley & Sons,2002. 

2. N.A. Sherwani, "Algorithms for VLSI Physical Design Automation", Kluwer Academic Publishers, 2002. 

3. Sadiq M. Sait, Habib Youssef, “VLSI Physical Design automation: Theory and Practice”, World   scientific 1999 

4. Steven M.Rubin, “Computer Aids for VLSI Design”, Addison Wesley Publishing 1987

AP7002 THREE DIMENSIONAL NETWORKS ON CHIP

AP7002 THREE DIMENSIONAL NETWORKS ON CHIP

UNIT I INTRODUCTION TO THREE DIMENSIONAL NOC

Three-Dimensional Networks-on-Chips Architectures. – Resource Allocation for QoS On-Chip Communication – Networks-on-Chip Protocols-On-Chip Processor Traffic Modeling for Networks-onChip 

UNIT II TEST AND FAULT TOLERANCE OF NOC

Design-Security in Networks-on-Chips-Formal Verification of Communications in Networks-on-ChipsTest and Fault Tolerance for Networks-on-Chip Infrastructures-Monitoring Services for Networks-onChips. 

UNIT III ENERGY AND POWER ISSUES OF NOC

Energy and Power Issues in Networks-on-Chips-The CHAIN works Tool Suite: AComplete Industrial Design Flow for Networks-on-Chips 

UNIT IV MICRO-ARCHITECTURE OF NOC ROUTER

Baseline NoC Architecture – MICRO-Architecture Exploration ViChaR: A Dynamic Virtual Channel Regulator for NoC Routers- RoCo: The Row-Column Decoupled Router – A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks. Exploring Fault Tolerant Networks-on-Chip Architectures.

UNIT V DIMDE ROUTER FOR 3D NOC

A Novel Dimensionally-Decomposed Router for On-Chip Communication in 3D Architectures-Digest of Additional NoC MACRO-Architectural Research. 

REFERENCES: 

1. Chrysostomos Nicopoulos, Vijaykrishnan Narayanan, Chita R.Das” Networks-on - Chip “ Architectures A Holistic Design Exploration”, Springer. 

2. Fayezgebali, Haythamelmiligi, Hqhahed Watheq E1-Kharashi “Networks-on-Chips  theory and practice CRC press.

AP7001 COMPUTER ARCHITECTURE AND PARALLEL PROCESSING

AP7001 COMPUTER ARCHITECTURE AND PARALLEL PROCESSING

UNIT I COMPUTER DESIGN AND PERFORMANCE MEASURES

Fundamentals of Computer Design– Parallel and Scalable Architectures – Multiprocessors – Multivector and SIMD architectures–Multithreaded architectures–Data-flow architectures-Performance Measures

UNIT II PARALLEL PROCESSING, PIPELINING AND ILP

Instruction Level Parallelism and Its Exploitation- Concepts and Challenges - Overcoming Data Hazards with Dynamic Scheduling – Dynamic Branch Prediction - Speculation - Multiple Issue Processors Performance and Efficiency in Advanced Multiple Issue Processors

UNIT III MEMORY HIERARCHY DESIGN

Memory Hierarchy - Memory Technology and Optimizations – Cache memory – Optimizations of Cache Performance–Memory Protection and Virtual Memory-Design of Memory Hierarchies

UNIT IV MULTIPROCESSORS 9 Symmetric and distributed shared memory architectures – Cache coherence issues - Performance Issues – Synchronization issues – Models of Memory Consistency - Interconnection networks – Buses, crossbar and multi-stage switches.

UNIT V MULTI-CORE ARCHITECTURES

Software and hardware multithreading – SMT and CMP architectures – Design issues – Case studies – Intel Multi-core architecture–SUN CMP architecture–IBM cell architecture-hp architecture. 

REFERENCES: 

1. Kai Hwang, "Advanced Computer Architecture", McGraw Hill International, 2001. 

2. John L. Hennessey and David A. Patterson, “Computer Architecture – A quantitative approach”, Morgan Kaufmann / Elsevier, 4th. edition, 2007. 

3. William Stallings, “Computer Organization and Architecture – Designing for Performance”, Pearson Education, Seventh Edition, 2006. 

4. John P. Hayes, “Computer Architecture and Organization”, McGraw Hill 

5. David E. Culler, Jaswinder Pal Singh, “Parallel Computing Architecture: A hardware/ software approach”, Morgan Kaufmann / Elsevier, 1997. 

6. Dimitrios Soudris, Axel Jantsch, "Scalable Multi-core Architectures: Design Methodologies and Tools", Springer, 2012 

7. John P. Shen, “Modern processor design. Fundamentals of super scalar processors”, Tata McGraw Hill 2003.

 

IF7301 SOFT COMPUTING

IF7301 SOFT COMPUTING

UNIT I INTRODUCTION TO SOFT COMPUTING

Evolution of Computing - Soft Computing Constituents – From Conventional AI to Computational Intelligence - Machine Learning Basics 

UNIT II         GENETIC ALGORITHMS

Introduction, Building block hypothesis, working principle, Basic operators and Terminologies like individual, gene, encoding, fitness function and reproduction, Genetic modeling: Significance of Genetic operators, Inheritance operator, cross over, inversion & deletion, mutation operator, Bitwise operator, GA optimization problems, JSPP (Job Shop Scheduling Problem), TSP (Travelling Salesman Problem),Differences & similarities between GA & other traditional methods, Applications of GA.

 UNIT III NEURAL NETWORKS

Machine Learning using Neural Network, Adaptive Networks – Feed Forward Networks – Supervised Learning Neural Networks – Radial Basis Function Networks - Reinforcement Learning – Unsupervised Learning Neural Networks – Adaptive Resonance Architectures – Advances in Neural Networks. 

UNIT IV FUZZY LOGIC

Fuzzy Sets – Operations on Fuzzy Sets – Fuzzy Relations – Membership Functions-Fuzzy Rules and Fuzzy Reasoning – Fuzzy Inference Systems – Fuzzy Expert Systems – Fuzzy Decision Making 

UNIT V NEURO-FUZZY MODELING

Adaptive Neuro-Fuzzy Inference Systems – Coactive Neuro-Fuzzy Modeling – Classification and Regression Trees – Data Clustering Algorithms – Rule base Structure Identification – Neuro-Fuzzy Control – Case Studies.

REFERENCES: 

1. Jyh-Shing Roger Jang, Chuen-Tsai Sun, Eiji Mizutani, “Neuro-Fuzzy and Soft Computing”, Prentice-Hall of India, 2003. 

2. Kwang H.Lee, “First course on Fuzzy Theory and Applications”, Springer–Verlag Berlin Heidelberg, 2005. 

3. George j. Klir and bo yuan, “fuzzy sets and fuzzy logic-theory and applications”, prentice hall, 1995. 

4. james a. freeman and david m. skapura, “neural networks algorithms, applications, and programming techniques”, pearson edn., 2003. 

5. david e. goldberg, “genetic algorithms in search, optimization and machine learning”, addison wesley, 2007. 

6. Mitsuo gen and runwei cheng,”genetic algorithms and engineering optimization”, wiley publishers 2000. 

7. mitchell melanie, “an introduction to genetic algorithm”, prentice hall, 1998. 

8. S.N.Sivanandam, S.N.Deepa, “Introduction To Genetic Algorithms”, Springer, 2007. 

9. Eiben And Smith “Introduction To Evolutionary Computing” Springer 

10.E. Sanchez, t. Shibata, and l. A. Zadeh, eds., "genetic algorithms and fuzzy logic systems: soft computing perspectives, advances in fuzzy systems - applications and theory", vol. 7, river edge, world scientific, 1997.

CU7006 WAVELET TRANSFORMS AND APPLICATIONS

CU7006 WAVELET TRANSFORMS AND APPLICATIONS

UNIT I FUNDAMENTALS 9 Vector Spaces – Properties– Dot Product – Basis – Dimension, Orthogonality   and Orthonormality – Relationship Between Vectors and Signals – Signal Spaces – Concept of Convergence – Hilbert Spaces for Energy Signals- Fourier Theory: Fourier series  expansion, Fourier transform, Short time Fourier transform, Time-frequency analysis.

UNIT II        MULTI RESOLUTION ANALYSIS

Definition of Multi Resolution Analysis (MRA) – Haar Basis – Construction of General Orthonormal MRA – Wavelet Basis for MRA – Continuous Time MRA Interpretation for the DTWT – Discrete Time MRA – Basis Functions for the DTWT – PRQMF Filter Banks.

UNIT III CONTINUOUS WAVELET   TRANSFORMS

Wavelet Transform – Definition and Properties – Concept of Scale and its Relation with Frequency – Continuous Wavelet Transform (CWT) – Scaling Function and Wavelet Functions (Daubechies Coiflet, Mexican Hat, Sinc, Gaussian, Bi Orthogonal)– Tiling of Time – Scale Plane for CWT.

UNIT IV DISCRETE WAVELET TRANSFORMS

Filter Bank   and   Sub   Band   Coding   Principles – Wavelet   Filters – Inverse   DWT Computation by Filter Banks – Basic Properties of Filter Coefficients – Choice of Wavelet Function Coefficients – Derivations of Daubechies Wavelets – Mallat's Algorithm for DWT – Multi Band Wavelet Transforms Lifting Scheme- Wavelet Transform Using Polyphase Matrix Factorization – Geometrical Foundations of Lifting Scheme – Lifting Scheme in Z –Domain. 

UNIT V APPLICATIONS

Wavelet methods for signal processing- Image Compression Techniques: EZW–SPHIT Coding – Image Denoising Techniques: Noise Estimation – Shrinkage Rules – Shrinkage Functions – Edge Detection  and Object Isolation, Image Fusion,   and Object Detection. 

TEXT BOOKS: 

1. Rao R  M  and  A  S  Bopardikar, ―Wavelet Transforms Introduction to theory and Applications, Pearson Education, Asia, 2000. 

2. L.Prasad & S.S.Iyengar, Wavelet Analysis with Applications to Image Processing, CRC Press, 1997.

REFERENCES: 

1. J. C. Goswami and A. K. Chan, “Fundamentals of wavelets: Theory, Algorithms and Applications" WileyInterscience Publication, John Wiley & Sons Inc., 1999. 

2. M. Vetterli, J. Kovacevic, “Wavelets and subband coding" Prentice Hall Inc, 1995. 

3. Stephen G. Mallat, “A wavelet tour of signal processing"  2 nd Edition Academic Press, 2000. 

4. Soman K P and Ramachandran K I, ―Insight into Wavelets From Theory to practice‖, Prentice Hall, 2004.

DS7201 ADVANCED DIGITAL IMAGE PROCESSING

DS7201 ADVANCED DIGITAL IMAGE PROCESSING

UNIT I FUNDAMENTALS OF DIGITAL IMAGE PROCESSING

Elements of visual perception, brightness, contrast, hue, saturation, mach band effect, 2D image transforms-DFT, DCT, KLT, and SVD. Image enhancement in spatial and frequency domain, Review of morphological image processing UNIT II SEGMENTATION 9 Edge detection, Thresholding, Region growing, Fuzzy clustering, Watershed algorithm, Active contour methods, Texture feature based segmentation, Model based segmentation, Atlas based segmentation, Wavelet based Segmentation methods

UNIT III      FEATURE EXTRACTION

First and second order edge detection operators, Phase congruency, Localized feature extractiondetecting image curvature, shape features Hough transform, shape skeletonization, Boundary descriptors, Moments, Texture descriptors- Autocorrelation, Co-occurrence features, Runlength features, Fractal model based features, Gabor filter, wavelet features

UNIT IV      REGISTRATION AND IMAGE FUSION

Registration- Preprocessing, Feature selection-points, lines, regions and templates Feature correspondence-Point pattern matching, Line matching, region matching Template matching .Transformation functions-Similarity transformation and Affine Transformation. Resampling- Nearest Neighbour and Cubic Splines Image Fusion-Overview of image fusion, pixel fusion, Multiresolution based fusion discrete wavelet transform, Curvelet transform. Region based fusion.

UNIT V 3D IMAGE VISUALIZATION

Sources of 3D Data sets, Slicing the Data set, Arbitrary section planes, The use of color, Volumetric display, Stereo Viewing, Ray tracing, Reflection, Surfaces, Multiply connected surfaces, Image processing in 3D, Measurements on 3D images. 

TEXT BOOKS: 

1. John C.Russ, “The Image Processing Handbook”, CRC Press,2007. 

2. Mark Nixon, Alberto Aguado, “Feature Extraction and Image Processing”, Academic Press, 2008. 3. Ardeshir Goshtasby, “ 2D and 3D Image registration for Medical, Remote Sensing and Industrial Applications”,John Wiley and Sons,2005. 

REFERENCES: 

1. Rafael C. Gonzalez, Richard E. Woods, , Digital Image Processing', Pearson,Education, Inc., Second Edition, 2004. 

2. Anil K. Jain, , Fundamentals of Digital Image Processing', Pearson Education,Inc., 2002. 

3. Rick S.Blum, Zheng Liu,“ Multisensor image fusion and its Applications“,Taylor& Francis,2006.

AP7301 ELECTROMAGNETIC INTERFERENCE AND COMPATIBILITY

AP7301 ELECTROMAGNETIC INTERFERENCE AND COMPATIBILITY

UNIT I           EMI/EMC CONCEPTS

EMI-EMC definitions and Units of parameters; Sources and victim of EMI; Conducted and Radiated EMI Emission and Susceptibility; Transient EMI, ESD; Radiation Hazards. 

UNIT II          EMI COUPLING PRINCIPLES

Conducted, radiated and transient coupling; Common ground impedance coupling ; Common mode and ground loop coupling ; Differential mode coupling ; Near field cable to cable coupling, cross talk ; Field to cable coupling ; Power mains and Power supply coupling. 

UNIT III         EMI CONTROL TECHNIQUES

Shielding- Shielding Material-Shielding integrity at discontinuities, Filtering- Characteristics of FiltersImpedance and Lumped element filters-Telephone line filter, Power line filter design, Filter installation and Evaluation, Grounding- Measurement of Ground resistance-system grounding for EMI/EMCCable shielded grounding, Bonding, Isolation transformer, Transient suppressors, Cable routing, Signal control. EMI gaskets 

UNIT IV         EMC DESIGN OF PCBS

EMI Suppression Cables-Absorptive, ribbon cables-Devices-Transient protection hybrid circuits ,Component selection and mounting; PCB trace impedance; Routing; Cross talk controlElectromagnetic Pulse-Noise from relays and switches, Power distribution decoupling; Zoning; Grounding; VIAs connection; Terminations. 

UNIT V         EMI MEASUREMENTS AND STANDARDS

Open area test site; TEM cell;  EMI test shielded chamber and shielded ferrite lined anechoic chamber; Tx /Rx Antennas, Sensors, Injectors / Couplers, and coupling factors; EMI Rx and spectrum analyzer; Civilian standards-CISPR, FCC, IEC, EN; Military standards-MIL461E/462. Frequency assignment - spectrum conversation.  British VDE standards, Euro norms standards in japan comparisons. EN Emission and Susceptibility standards and Specifications.

REFERENCES: 

1. V.P.Kodali, “Engineering EMC Principles, Measurements and Technologies”, IEEE Press,  Newyork,  1996 

2. Clayton R.Paul,” Introduction to Electromagnetic Compatibility”, John Wiley Publications, 2008 3. Henry W.Ott.,”Noise Reduction Techniques in Electronic Systems”, A Wiley Inter Science Publications, John Wiley and Sons, New york, 1988. 

4. Bemhard Keiser, “Principles of Electromagnetic Compatibility”, 3rd Ed, Artech house, Norwood, 1986. 

5. Don R.J.White Consultant Incorporate, “Handbook of EMI/EMC”, Vol I-V, 1988.

CP7103 MULTI CORE ARCHITECTURES

CP7103 MULTI CORE ARCHITECTURES

UNIT I FUNDAMENTALS OF QUANTITATIVE DESIGN AND ANALYSIS

Classes of Computers – Trends in Technology, Power, Energy and Cost – Dependability – Measuring, Reporting and Summarizing Performance – Quantitative Principles of Computer Design – Classes of Parallelism - ILP, DLP, TLP and RLP - Multithreading - SMT and CMP Architectures – Limitations of Single Core Processors -The Multicore era – Case Studies of Multicore Architectures. 

UNIT II DLP IN VECTOR, SIMD AND GPU ARCHITECTURES

Vector Architecture - SIMD Instruction Set Extensions for Multimedia – Graphics Processing Units Detecting and Enhancing Loop Level Parallelism - Case Studies. UNIT III TLP AND MULTIPROCESSORS 9 Symmetric and Distributed Shared Memory Architectures – Cache Coherence Issues - Performance Issues – Synchronization Issues – Models of Memory Consistency - Interconnection Networks – Buses, Crossbar and Multi-stage Interconnection Networks.

UNIT IV        RLP AND DLP IN WA REHOUSE-SCALE ARCHITECTURES

Programming Models and Workloads for Warehouse-Scale Computers – Architectures for Warehouse-Scale Computing – Physical Infrastructure and Costs – Cloud Computing – Case Studies.

UNIT V     ARCHITECTURES FOR EMBEDDED SYSTEMS

Features and Requirements of Embedded Systems – Signal Processing and Embedded Applications – The Digital Signal Processor – Embedded Multiprocessors - Case Studies. 

REFERENCES: 

1. John L. Hennessey and David A. Patterson, “ Computer Architecture – A Quantitative Approach”, Morgan Kaufmann / Elsevier, 5th edition, 2012. 

2. Kai Hwang, “Advanced Computer Architecture”, Tata McGraw-Hill Education, 2003 

3. Richard Y. Kain, “Advanced Computer Architecture a Systems Design Approach”, Prentice Hall, 2011. 

4. David E. Culler, Jaswinder Pal Singh, “Parallel Computing Architecture : A Hardware/ Software Approach” , Morgan Kaufmann / Elsevier, 1997.

AP7203 EMBEDDED SYSTEMS

AP7203 EMBEDDED SYSTEMS

UNIT I            INTRODUCTION

Embedded Computers, Characteristics of Embedded Computing Applications, Challenges in Embedded Computing system design, Embedded system design process- Requirements, Specification, Architectural Design, Designing Hardware and Software Components, System Integration, Formalism for System Design- Structural Description, Behavioural Description, Design Example: Model Train Controller, ARM processor- processor and memory organization. 

UNIT II           EMBEDDED PROCESSORS

Data operations, Flow of Control, SHARC processor- Memory organization, Data operations, Flow of Control, parallelism with instructions, CPU Bus configuration, ARM Bus, SHARC Bus, Memory devices, Input/output devices, Component interfacing, designing with microprocessor development and debugging, Design Example : Alarm Clock. Hybrid Architecture 

UNITIII DISTRIBUTED EMBEDDED ARCHITECTURE

Hardware and Software Architectures, Networks for embedded systems- I2C, CAN Bus, SHARC link supports, Ethernet, Myrinet, Internet, Network-Based design- Communication Analysis, system performance Analysis, Hardware platform design, Allocation and scheduling, Design Example: Elevator Controller.

UNIT IV             REAL-TIME CHARACTERISTICS

Clock driven Approach, weighted round robin Approach, Priority driven Approach, Dynamic Versus Static systems, effective release times and deadlines, Optimality of the Earliest deadline first (EDF) algorithm, challenges in validating timing constraints in priority driven systems, Off-line Versus On-line scheduling. 

UNIT V SYSTEM DESIGN TECHNIQUES

Design Methodologies, Requirement Analysis, Specification, System Analysis and Architecture Design, Quality Assurance, Design Example: Telephone PBX- System Architecture, Ink jet printerHardware Design and Software Design, Personal Digital Assistants, Set-top Boxes.

REFERENCES: 

1. Wayne Wolf, “Computers as Components: Principles of Embedded Computing  System Design”, Morgan Kaufman Publishers, 2008. 

2. Jane.W.S. Liu, “Real-Time systems”, Pearson Education Asia, 2000. 

3. C. M. Krishna and K. G. Shin, “Real-Time Systems” , McGraw-Hill, 1997 

4. Frank Vahid and Tony Givargis, “Embedded System Design: A Unified Hardware/Software Introduction” , John Wiley & Sons, 2006.

AP7202 ASIC AND FPGA DESIGN

AP7202 ASIC AND FPGA DESIGN 

UNIT I           OVERVIEW OF ASIC AND PLD

Types of ASICs - Design flow – CAD tools used in ASIC Design – Programming Technologies: Antifuse – static RAM – EPROM and EEPROM technology, Programmable Logic Devices : ROMs and EPROMs – PLA –PAL. Gate Arrays – CPLDs and FPGAs 

UNIT II       ASIC PHYSICAL DESIGN

System partition -partitioning - partitioning methods – interconnect delay models and measurement of delay - floor planning - placement – Routing : global routing - detailed routing - special routing - circuit extraction - DRC 

UNIT III       LOGIC SYNTHESIS, SIMULATION AND TESTING

Design systems - Logic Synthesis - Half gate ASIC -Schematic entry - Low level design language PLA tools -EDIF- CFI design representation. Verilog and logic synthesis -VHDL and logic synthesis types of simulation -boundary scan test -fault simulation - automatic test pattern generation. 

UNIT IV  FPGA

Field Programmable gate arrays- Logic blocks, routing architecture, Design flow technology - mapping for FPGAs,  Xilinx  XC4000 - ALTERA’s FLEX 8000/10000, ACTEL’s ACT-1,2,3 and their speed performance Case studies:  Altera MAX 5000 and 7000 - Altera MAX 9000 – Spartan II and Virtex II FPGAs - Apex and Cyclone FPGAs 

UNITV SOC DESIGN

Design Methodologies – Processes and Flows - Embedded software development for SOC – Techniques for SOC Testing – Configurable SOC – Hardware / Software codesign Case studies: Digital camera, Bluetooth radio / modem, SDRAM and USB

REFERENCES: 

1.  M.J.S .Smith, "Application Specific Integrated Circuits, Addison -Wesley Longman Inc., 1997 

2. S. Trimberger, Field Programmable Gate Array Technology, Edr, Kluwer Academic Publications, 1994. 

3. John V.Oldfield, Richard C Dore, Field Programmable Gate Arrays, Wiley Publications 1995. 

4. P.K.Chan & S. Mourad, Digital Design Using Field Programmable Gate Array, Prentice Hall, 1994. 

5. Parag.K.Lala, Digital System Design using Programmable Logic Devices , BSP, 2003. 

6. S. Brown, R. Francis, J. Rose, Z. Vransic, Field Programmable Gate Array, Kluwer Pubin, 1992. 

7. J. Old Field, R.Dorf, Field Programmable Gate Arrays, John Wiley & Sons, Newyork, 1995. 

8. Farzad Nekoogar and Faranak Nekoogar, From ASICs to SOCs: A Practical  Approach, Prentice Hall PTR, 2003. 

9.  Wayne Wolf, FPGA-Based System Design, Prentice Hall PTR, 2004. 

10. R. Rajsuman, System-on-a-Chip Design and Test. Santa Clara, CA: Artech House  Publishers, 2000. 

11. F. Nekoogar. Timing Verification of Application-Specific Integrated Circuits (ASICs). Prentice Hall PTR, 1999.

AP7201 ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS

AP7201 ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS

UNIT I          SINGLE STAGE AMPLIFIERS

Common source stage, Source follower, Common gate stage, Cascode stage, Single ended and differential operation, Basic differential pair, Differential pair with MOS loads 

UNIT II        FREQUENCY RESPONSE AND NOISE ANALYSIS

Miller effect ,Association of poles with nodes, frequency response of common source stage, Source followers, Common gate stage, Cascode stage, Differential pair, Statistical characteristics of noise, noise in single stage amplifiers, noise in differential amplifiers.

UNIT III      OPERATIONAL AMPLIFIERS

Concept of negative feedback, Effect of loading in feedback networks, operational amplifier performance parameters, One-stage Op Amps, Two-stage Op Amps, Input range limitations, Gain boosting, slew rate, power supply rejection, noise in Op Amps. 

UNIT IV     STABILITY AND FREQUENCY COMPENSATION

General considerations, Multipole systems, Phase Margin, Frequency Compensation, and Compensation of two stage Op Amps, Slewing in two stage Op Amps, and Other compensation techniques. 

UNIT V       BIASING CIRCUITS

Basic current mirrors, cascode current mirrors, active current mirrors, voltage references, supply independent biasing, temperature independent references, PTAT current generation, Constant-Gm Biasing.

REFERENCES: 

1. Paul R. Gray, Paul J. Hurst, Stephen H. Lewis, Robert G. Meyer, Analysis and Design of Analog Integrated Circuits, 5th Edition, Wiley, 2009. 

2. Behzad Razavi, “Design of Analog CMOS Integrated Circuits”, Tata McGraw Hill, 2001 

3.   Willey M.C. Sansen, “Analog design essentials”, Springer, 2006. 

4. Grebene, “Bipolar and MOS Analog Integrated circuit design”, John Wiley & sons,Inc., 2003. 

5. Phillip E.Allen, Douglas R.Holberg, “CMOS Analog Circuit Design”, Second edition, Oxford University Press, 2002

AP7103 ADVANCED MICROPROCESSOR AND MICROCONTROLLER

AP7103 ADVANCED MICROPROCESSOR AND MICROCONTROLLER

UNIT I OVERVIEW

Generic Architecture--Instruction Set – Data formats –Addressing modes – Memory hierarchy – register file –Cache – Virtual memory and paging – Segmentation- pipelining –the instruction pipeline – pipeline hazards – instruction level parallelism – reduced instruction set –Computer principles – RISC versus CISC. 

UNIT II          HIGH PERFORMANCE CISC ARCHITECTURE – PENTIUM

CPU Architecture- Bus Operations – Pipelining – Brach predication – floating point unit-Operating Modes –Paging – Multitasking – Exception and Interrupts – Instruction set –addressing modes – Programming the Pentium processor. 

UNIT III        HIGH PERFORMANCE RISC ARCHITECTURE – ARM

Organization of CPU – Bus architecture –Memory management unit - ARM instruction set- Thumb Instruction set- addressing modes – Programming the ARM processor.

UNIT IV MOTOROLA 68HC11 MICROCONTROLLERS

Instruction set addressing modes – operating modes- Interrupt system- RTC-Serial Communication Interface – A/D Converter PWM and UART. 

UNIT V        PIC MICROCONTROLLER

CPU Architecture – Instruction set – interrupts- Timers- I2C Interfacing – UART- A/D Converter –PWM and introduction to C-Compilers.

REFERENCES: 

1. Daniel Tabak , ‘’Advanced Microprocessors” McGraw Hill.Inc., 1995 

2. James L. Antonakos , “ The Pentium Microprocessor ‘’ Pearson Education , 1997. 

3. Steve Furber, ‘’ ARM System –On –Chip architecture “Addision Wesley , 2000. 

4. Gene .H.Miller .” Micro Computer Engineering ,” Pearson Education , 2003. 

5. John .B.Peatman , “ Design with PIC Microcontroller , Prentice hall, 1997. 

6. James L.Antonakos ,” An Introduction to the Intel family of Microprocessors ‘’  Pearson Education 1999. 

7. Barry.B.Breg,” The Intel Microprocessors Architecture , Programming and  Interfacing “ , PHI,2002. 

8. Valvano "Embedded Microcomputer Systems" Thomson Asia PVT LTD first reprint  2001.

AP7102 ADVANCED DIGITAL LOGIC SYSTEM DESIGN

AP7102 ADVANCED DIGITAL LOGIC SYSTEM DESIGN

UNIT I SEQUENTIAL CIRCUIT DESIGN

Analysis of Clocked Synchronous Sequential Networks (CSSN) - Modeling of CSSN – State Assignment and Reduction – Design of CSSN – Design of Iterative Circuits – ASM Chart – ASM Realization, Design of Arithmetic circuits for Fast adder- Array Multiplier.

UNIT II ASYNCHRONOUS SEQUENTIAL CIRCUIT DESIGN

Analysis of Asynchronous Sequential Circuit (ASC) – Flow Table Reduction – Races in ASC – State Assignment Problem and the Transition Table – Design of ASC – Static and Dynamic Hazards – Essential Hazards – Design of Hazard free circuits - Data Synchronizers – Designing Vending Machine Controller – Mixed Operating Mode Asynchronous Circuits. Practical issues such as clock skew, synchronous and asynchronous inputs and switch bouncing.

UNIT III         FAULT DIAGNOSIS & TESTING

Fault diagnosis: Fault Table Method – Path Sensitization Method – Boolean Difference Method – Kohavi Algorithm – Tolerance Techniques – The Compact Algorithm. Design for testability: Test Generation – Masking Cycle – DFT Schemes. Circuit testing fault model, specific and random faults, testing of sequential circuits, Built in Self Test, Built in Logic Block observer (BILBO), signature analysis.

UNIT IV        PERFORMANCE ESTIMATION

Estimating digital system reliability, transmission lines, reflections and terminations, system integrity, network issues for digital systems, formal verifications of digital system: model-checking, binary decision diagram, theorem proving, circuit equivalence.

UNIT V    TIMING ANALYSIS

ROM timings, Static RAM timing, Synchronous Static RAM and it’s timing, Dynamic RAM timing, Complex Programmable Logic Devices, Logic Analyzer Basic Architecture, Internal structure, Data display, Setup and Control, Clocking and Sampling.

REFERENCES: 

1. Charles H.Roth Jr “Fundamentals of Logic Design”, Thomson Learning 2004. 

2. Nripendra N Biswas “Logic Design Theory” Prentice Hall of India, 2001. 

3. Parag K.Lala “An introduction to Logic Circuit Testing” Morgan and claypool publishers, 2009.

4. Stephen D Brown, “Fundamentals of digital logic”, TMH publication, 2007. 

5. Balabanian, “Digital Logic Design Principles”, Wiley publication, 2007. 

6. Stalling, “Computer Organization & Architecture”, Pearson Education India, 2008. 

7. J.F.Wakerly, “Digital Design”, Pearson Education India, 2012. 

8. J.F.Wakerly, “Digital Design principles and practices”, PHI publications, 2005. 

9. Charles J. Sipil, Microcomputer Handbook  McCrindle- Collins Publications 1977.

AP7101 ADVANCED DIGITAL SIGNAL PROCESSING

AP7101 ADVANCED DIGITAL SIGNAL PROCESSING

UNIT I DISCRETE RANDOM SIGNAL PROCESSING

Weiner Khitchine relation - Power spectral density – filtering random process, Spectral Factorization Theorem, special types of random process – Signal modeling-Least Squares method, Pade approximation, Prony’s method, iterative Prefiltering, Finite Data records, Stochastic Models.

UNIT II SPECTRUM ESTIMATION

Non-Parametric methods - Correlation method - Co-variance estimator - Performance analysis of estimators – Unbiased consistent estimators - Periodogram estimator - Barlett spectrum estimation Welch estimation - Model based approach - AR, MA, ARMA Signal modeling - Parameter estimation using Yule-Walker method.

UNIT III LINEAR ESTIMATION AND PREDICTION

Maximum likelihood criterion - Efficiency of estimator - Least mean squared error criterion - Wiener filter - Discrete Wiener Hoff equations - Recursive estimators - Kalman filter - Linear prediction, Prediction error - Whitening filter, Inverse filter - Levinson recursion, Lattice realization, Levinson recursion algorithm for solving Toeplitz system of equations.

UNIT IV ADAPTIVE FILTERS

FIR Adaptive filters - Newton's steepest descent method - Adaptive filters based on steepest descent method - Widrow Hoff LMS Adaptive algorithm - Adaptive channel equalization - Adaptive echo canceller - Adaptive noise cancellation - RLS Adaptive filters - Exponentially weighted RLS - Sliding window RLS - Simplified IIR LMS Adaptive filter.

UNIT V MULTIRATE DIGITAL SIGNAL PROCESSING

Mathematical description of change of sampling rate - Interpolation and Decimation - Continuous time model - Direct digital domain approach - Decimation by integer factor - Interpolation by an integer factor - Single and multistage realization - Poly phase realization - Applications to sub band coding Wavelet transform and filter bank implementation of wavelet expansion of signals.

REFERENCES: 

1. Monson H. Hayes, “Statistical Digital Signal Processing and Modeling”, John Wiley and Sons Inc., New York, 2006. 

2. Sophoncles J. Orfanidis, “Optimum Signal Processing “, McGraw-Hill, 2000. 

3. John G. Proakis, Dimitris G. Manolakis, “Digital Signal Processing”, Prentice Hall of India, New Delhi, 2005. 

4. Simon Haykin, “Adaptive Filter Theory”, Prentice Hall, Englehood Cliffs, NJ1986. 

5. S. Kay,” Modern Spectrum Estimation Theory and Application”, prentice hall, englehood cliffs, nj1988. 6. P. P. Vaidyanathan, “multirate systems and filter banks”, prentice hall, 1992.

MA7157 APPLIED MATHEMATICS FOR ELECTRONICS ENGINEERS

MA7157 APPLIED MATHEMATICS FOR ELECTRONICS ENGINEERS 

UNIT I FUZZY LOGIC

Classical logic – Multivalued logics – Fuzzy propositions – Fuzzy quantifiers. 

UNIT II MATRIX THEORY

Some important matrix factorizations – The Cholesky decomposition – QR factorization – Least squares method – Singular value decomposition -Toeplitz matrices and some applications.

UNIT III ONE DIMENSIONAL RANDOM VARIABLES

Random variables - Probability function – moments – moment generating functions and their properties – Binomial, Poisson, Geometric, Uniform, Exponential, Gamma and Normal distributions – Function of a Random Variable. 

UNIT IV DYNAMIC PROGRAMMING

Dynamic programming – Principle of optimality – Forward and backward recursion – Applications of dynamic programming – Problem of dimensionality.

UNIT V QUEUEING MODELS

Poisson Process – Markovian queues – Single and Multi-server Models – Little’s formula - Machine Interference Model – Steady State analysis – Self Service queue.

REFERENCES: 

1. George J. Klir and Yuan, B., Fuzzy sets and fuzzy logic, Theory and applications, Prentice Hall of India Pvt. Ltd., 1997. 

2. Moon, T.K., Sterling, W.C., Mathematical methods and algorithms for signal processing, Pearson Education, 2000. 

3. Richard Johnson, Miller & Freund’s Probability and Statistics for Engineers, 7th Edition, Prentice – Hall of India, Private Ltd., New Delhi (2007). 

4. Taha, H.A., Operations Research, An introduction, 7th edition, Pearson education editions, Asia, New Delhi, 2002. 

5. Donald Gross and Carl M. Harris, Fundamentals of Queuing theory, 2nd edition, John Wiley and Sons, New York (1985).

ET7015 DIGITAL IMAGE PROCESSING AND APPLICATIONS

ET7015       DIGITAL IMAGE PROCESSING AND APPLICATIONS

UNIT I    FUNDAMENTALS OF IMAGE PROCESSING

Introduction – Steps in image processing systems – Image acquisition – Sampling and Quantization – Pixel relationships – Color fundamentals and models, File formats, Image operations – Arithmetic, Geometric and Morphological

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UNIT II    IMAGE ENHANCEMENT

Spatial Domain: Gray level Transformations – Histogram processing – Spatial filtering smoothing and sharpening.  Frequency Domain: Filtering in frequency domain – DFT, FFT, DCT – Smoothing and sharpening filters – Homomorphic Filtering

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UNIT III   IMAGE SEGMENTATION AND FEATURE ANALYSIS

Detection of Discontinuities – Edge operators – Edge linking and Boundary Detection – Thresholding – Region based segmentation – Morphological Watersheds – Motion Segmentation, Feature Analysis and Extraction. 

UNIT IV    MULTI RESOLUTION ANALYSIS AND COMPRESSIONS

Multi Resolution Analysis: Image Pyramids – Multi resolution expansion – Wavelet Transforms, Image compression: Fundamentals – Models – Elements of Information Theory – Error free compression – Lossy Compression – Compression Standards

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UNIT V    APPLICATION OF IMAGE PROCESSING

Image classification – Image recognition – Image understanding – Video motion analysis – Image fusion – Steganography – Digital compositing Mosaics – Colour Image Processing.

REFERENCES : 

1. Rafael C.Gonzalez and Richard E.Woods, “Digital Image Processing”, 2nd Edition,      Pearson Education, 2003. 

2. Milan Sonka, Valclav Halavac and Roger Boyle, “Image Processing, Analysis and      Machine Vision”, 2nd Edition, Thomson Learning, 2001. 

3. Anil K.Jain, “Fundamentals of Digital Image Processing”. Pearson Education, 2003.   

ET7014 APPLICATION OF MEMS TECHNOLOGY

ET7014       APPLICATION OF MEMS TECHNOLOGY

UNIT I  MEMS:MICRO-FABRICATION, MATERIALS AND ELECTRO-MECHANICAL CONEPTS

Overview of micro fabrication – Silicon and other material based fabrication processes – Concepts: Conductivity of semiconductors-Crystal planes and orientation-stress and strainflexural beam bending analysis-torsional deflections-Intrinsic stress- resonant frequency and quality factor. 

UNIT II      ELECTROSTATIC SENSORS AND ACTUATION

Principle, material, design and fabrication of parallel plate capacitors as electrostatic sensors and actuators-Applications  

UNIT III     THERMAL SENSING AND ACTUATION

Principle, material, design and fabrication of thermal couples, thermal bimorph sensors, thermal resistor sensors-Applications.  

UNIT IV     PIEZOELECTRIC SENSING AND ACTUATION

Piezoelectric effect-cantilever piezo electric actuator model-properties of piezoelectric materials-Applications

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UNIT V     CASE STUDIES

Piezoresistive sensors, Magnetic actuation, Micro fluidics applications, Medical applications, Optical MEMS.-NEMS Devices 

REFERENCES 

1. Chang Liu, “Foundations of MEMS”, Pearson International Edition, 2006. 

2. Marc Madou , “Fundamentals of microfabrication”,CRC Press, 1997.

3. Boston , “Micromachined Transducers Sourcebook”,WCB McGraw Hill, 1998. 

4. M.H.Bao “Micromechanical transducers :Pressure sensors, accelerometers and     gyroscopes”, Elsevier, Newyork, 2000. 

5. P. RaiChoudry“ MEMS and MOEMS Technology and Applications”, PHI, 2012. 

6. Stephen D. Senturia, “ Microsystem Design”, Springer International Edition, 2011. 

CL7004 ROBOTICS AND CONTROL

CL7004 ROBOTICS AND CONTROL

UNIT I         INTRODUCTION AND TERMINOLOGIES:

Definition-Classification-History- Robots components-Degrees of freedom-Robot joints- coordinates- Reference frames-workspace-Robot languages-actuators-sensors- Position, velocity and acceleration sensors-Torque sensors-tactile and touch sensors-proximity and range sensors- vision system-social issues  

UNIT II        KINEMATICS

Mechanism-matrix representation-homogenous transformation-DH representation-Inverse kinematics-solution and programming-degeneracy and dexterity 

UNIT III       DIFFERENTIAL  MOTION AND PATH PLANNING

Jacobian-differential motion of frames-Interpretation-calculation of Jacobian-Inverse Jacobian- Robot Path planning  

UNIT IV      DYNAMIC MODELLING

Lagrangian mechanics- Two-DOF manipulator- Lagrange-Euler formulation – Newton-Euler formulation – Inverse dynamics  

UNIT V      ROBOT CONTROL SYSTEM

Linear control schemes- joint actuators- decentralized PID control- computed torque control – force control- hybrid position force control- Impedance/ Torque control.

REFERENCES 

1. R.K. Mittal and I J Nagrath, “ Robotics and Control”,  Tata MacGrawHill, Fourth Reprint 2003. 

2. Saeed B. Niku ,''Introduction to Robotics '', Pearson Education, 2002 

3. Fu, Gonzalez and Lee Mcgrahill ,''Robotics ", international 

4. R.D. Klafter, TA Chmielewski and Michael Negin, "Robotic Engineering, An Integrated approach", Prentice Hall of India, 2003. 

5. Reza N.Jazar, Theory of Applied Robotics Kinematics, Dynamics and Control, Springer, Fist Indian Reprint 2010.