VL9265 DSP PROCESSOR ARCHITECTURE AND PROGRAMMING

VL9265 DSP PROCESSOR ARCHITECTURE AND PROGRAMMING

UNIT I FUNDAMENTALS OF PROGRAMMABLE DSPs

Multiplier and Multiplier accumulator – Modified Bus Structures and Memory access in PDSPs
– Multiple access memory – Multi-port memory – VLIW architecture- Pipelining –
Special Addressing modes in P-DSPs – On chip Peripherals.

UNIT II TMS320C5X PROCESSOR

Architecture – Assembly language syntax - Addressing modes – Assembly language
Instructions - Pipeline structure, Operation – Block Diagram of DSP starter kit –
Application Programs for processing real time signals.

UNIT III TMS320C3X PROCESSOR

Architecture – Data formats - Addressing modes – Groups of addressing modes-
Instruction sets - Operation – Block Diagram of DSP starter kit – Application Programs
for processing real time signals – Generating and finding the sum of series, Convolution
of two sequences, Filter design

UNIT IV ADSP PROCESSORS

Architecture of ADSP-21XX and ADSP-210XX series of DSP processors- Addressing
modes and assembly language instructions – Application programs –Filter design, FFT
calculation.

UNIT V ADVANCED PROCESSORS

Architecture of TMS320C54X: Pipe line operation, Code Composer studio - Architecture
of TMS320C6X - Architecture of Motorola DSP563XX – Comparison of the features of
DSP family processors.

REFERENCES:
1. B.Venkataramani and M.Bhaskar, “Digital Signal Processors – Architecture,
Programming and Applications” – Tata McGraw – Hill Publishing Company Limited.
New Delhi, 2003.
2. User guides Texas Instrumentation, Analog Devices, Motorola.