VL9212 VLSI DESIGN TECHNIQUES
UNIT I MOS TRANSISTOR THEORY AND PROCESS TECHNOLOGY 9
NMOS and PMOS transistors, Threshold voltage- Body effect- Design equations-
Second order effects. MOS models and small signal AC characteristics. Basic CMOS
technology.
UNIT II INVERTERS AND LOGIC GATES 9
NMOS and CMOS Inverters, Stick diagram, Inverter ratio, DC and transient
characteristics , switching times, Super buffers, Driving large capacitance loads, CMOS
logic structures , Transmission gates, Static CMOS design, dynamic CMOS design.
UNIT III CIRCUIT CHARACTERIZATION AND PERFORMANCE
ESTIMATION
Resistance estimation, Capacitance estimation, Inductance, switching characteristics,
transistor sizing, power dissipation and design margining. Charge sharing .Scaling.
UNIT IV VLSI SYSTEM COMPONENTS CIRCUITS AND SYSTEM LEVEL
PHYSICAL DESIGN
Multiplexers, Decoders, comparators, priority encoders, Shift registers. Arithmetic
circuits – Ripple carry adders, Carry look ahead adders, High-speed adders, Multipliers.
Physical design – Delay modelling ,cross talk, floor planning, power distribution. Clock
distribution. Basics of CMOS testing.
UNIT V VERILOG HARDWARE DESCRIPTION LANGUAGE 9
Overview of digital design with Verilog HDL, hierarchical modeling concepts, modules
and port definitions, gate level modeling, data flow modeling, behavioral modeling, task
& functions, Test Bench.
REFERENCES:
1. Neil H.E. Weste and Kamran Eshraghian, Principles of CMOS VLSI Design, Pearson
Education ASIA, 2nd edition, 2000.
2. John P.Uyemura “Introduction to VLSI Circuits and Systems”, John Wiley & Sons,
Inc., 2002.
3. Samir Palnitkar, “Verilog HDL”, Pearson Education, 2nd Edition, 2004.
4. Eugene D.Fabricius, “Introduction to VLSI Design”, McGraw Hill International
Editions, 1990.
5. J.Bhasker, B.S.Publications, “A Verilog HDL Primer”, 2nd Edition, 2001.
6. Pucknell, “Basic VLSI Design”, Prentice Hall of India Publication, 1995.
7. Wayne Wolf “Modern VLSI Design System on chip. Pearson Education.2002.
(use your town pincode for cash on delivery)
UNIT I MOS TRANSISTOR THEORY AND PROCESS TECHNOLOGY 9
NMOS and PMOS transistors, Threshold voltage- Body effect- Design equations-
Second order effects. MOS models and small signal AC characteristics. Basic CMOS
technology.
UNIT II INVERTERS AND LOGIC GATES 9
NMOS and CMOS Inverters, Stick diagram, Inverter ratio, DC and transient
characteristics , switching times, Super buffers, Driving large capacitance loads, CMOS
logic structures , Transmission gates, Static CMOS design, dynamic CMOS design.
UNIT III CIRCUIT CHARACTERIZATION AND PERFORMANCE
ESTIMATION
Resistance estimation, Capacitance estimation, Inductance, switching characteristics,
transistor sizing, power dissipation and design margining. Charge sharing .Scaling.
UNIT IV VLSI SYSTEM COMPONENTS CIRCUITS AND SYSTEM LEVEL
PHYSICAL DESIGN
Multiplexers, Decoders, comparators, priority encoders, Shift registers. Arithmetic
circuits – Ripple carry adders, Carry look ahead adders, High-speed adders, Multipliers.
Physical design – Delay modelling ,cross talk, floor planning, power distribution. Clock
distribution. Basics of CMOS testing.
UNIT V VERILOG HARDWARE DESCRIPTION LANGUAGE 9
Overview of digital design with Verilog HDL, hierarchical modeling concepts, modules
and port definitions, gate level modeling, data flow modeling, behavioral modeling, task
& functions, Test Bench.
REFERENCES:
1. Neil H.E. Weste and Kamran Eshraghian, Principles of CMOS VLSI Design, Pearson
Education ASIA, 2nd edition, 2000.
2. John P.Uyemura “Introduction to VLSI Circuits and Systems”, John Wiley & Sons,
Inc., 2002.
3. Samir Palnitkar, “Verilog HDL”, Pearson Education, 2nd Edition, 2004.
4. Eugene D.Fabricius, “Introduction to VLSI Design”, McGraw Hill International
Editions, 1990.
5. J.Bhasker, B.S.Publications, “A Verilog HDL Primer”, 2nd Edition, 2001.
6. Pucknell, “Basic VLSI Design”, Prentice Hall of India Publication, 1995.
7. Wayne Wolf “Modern VLSI Design System on chip. Pearson Education.2002.
(use your town pincode for cash on delivery)
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