AP9212 ADVANCED DIGITAL SYSTEM DESIGN
UNIT I SEQUENTIAL CIRCUIT DESIGN 9
Analysis of clocked synchronous sequential circuits and modeling- State diagram, state
table, state table assignment and reduction-Design of synchronous sequential circuitsdesign
of iterative circuits-ASM chart and realization using ASM
table, state table assignment and reduction-Design of synchronous sequential circuitsdesign
of iterative circuits-ASM chart and realization using ASM
UNIT II ASYNCHRONOUS SEQUENTIAL CIRCUIT DESIGN 9
Analysis of asynchronous sequential circuit – flow table reduction-races-state
assignment-transition table and problems in transition table- design of asynchronous
sequential circuit-Static, dynamic and essential hazards – data synchronizers – mixed
operating mode asynchronous circuits – designing vending machine controller
UNIT III FAULT DIAGNOSIS AND TESTABILITY ALGORITHMS 9
Fault table method-path sensitization method – Boolean difference method-D algorithm
-Tolerance techniques – The compact algorithm – Fault in PLA – Test generation-DFT
schemes – Built in self test
Analysis of asynchronous sequential circuit – flow table reduction-races-state
assignment-transition table and problems in transition table- design of asynchronous
sequential circuit-Static, dynamic and essential hazards – data synchronizers – mixed
operating mode asynchronous circuits – designing vending machine controller
UNIT III FAULT DIAGNOSIS AND TESTABILITY ALGORITHMS 9
Fault table method-path sensitization method – Boolean difference method-D algorithm
-Tolerance techniques – The compact algorithm – Fault in PLA – Test generation-DFT
schemes – Built in self test
UNIT IV SYNCHRONOUS DESIGN USING PROGRAMMABLE DEVICES 9
Programming logic device families – Designing a synchronous sequential circuit using
PLA/PAL – Realization of finite state machine using PLD – FPGA – Xilinx FPGA-Xilinx
4000
Programming logic device families – Designing a synchronous sequential circuit using
PLA/PAL – Realization of finite state machine using PLD – FPGA – Xilinx FPGA-Xilinx
4000
UNIT V SYSTEM DESIGN USING VHDL 9
VHDL operators – Arrays – concurrent and sequential statements – packages- Data flow
– Behavioral – structural modeling – compilation and simulation of VHDL code –Test
bench - Realization of combinational and sequential circuits using HDL – Registers –
counters – sequential machine – serial adder – Multiplier- Divider – Design of simple
micropr ocessor
REFERENCES:
1. Charles H.Roth Jr “Fundamentals of Logic Design” Thomson Learning 2004
2. Nripendra N Biswas “Logic Design Theory” Prentice Hall of India,2001
3. Parag K.Lala “Fault Tolerant and Fault Testable Hardware Design” B S
Publications,2002
4. Parag K.Lala “Digital system Design using PLD” B S Publications,2003
5. Charles H Roth Jr.”Digital System Design using VHDL” Thomson learning, 2004
6. Douglas L.Perry “VHDL programming by Example” Tata McGraw.Hill - 2006
(use your town pincode for cash on delivery)
VHDL operators – Arrays – concurrent and sequential statements – packages- Data flow
– Behavioral – structural modeling – compilation and simulation of VHDL code –Test
bench - Realization of combinational and sequential circuits using HDL – Registers –
counters – sequential machine – serial adder – Multiplier- Divider – Design of simple
micropr ocessor
REFERENCES:
1. Charles H.Roth Jr “Fundamentals of Logic Design” Thomson Learning 2004
2. Nripendra N Biswas “Logic Design Theory” Prentice Hall of India,2001
3. Parag K.Lala “Fault Tolerant and Fault Testable Hardware Design” B S
Publications,2002
4. Parag K.Lala “Digital system Design using PLD” B S Publications,2003
5. Charles H Roth Jr.”Digital System Design using VHDL” Thomson learning, 2004
6. Douglas L.Perry “VHDL programming by Example” Tata McGraw.Hill - 2006
(use your town pincode for cash on delivery)
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